Job Location: hybrid in Timisoara

Recruitment process:

• introductory call
• technical interview
• HR discussion

Role description:

This position is a unique opportunity to exercise your hardware verification skills on cutting edge designs within the prestigious PowerVR Hardware Graphics group our client is currently growing. Here you will exercise your skills on key components that meet latest demands and improvements for
graphics, AI or connectivity processor and related IP.

You will:

• Oversee all verification activities for a GPU component or subsystem, from initial planning to final sign-off.
• Develop verification plans and build, maintain UVM testbench components.
• Monitor, track, and report verification metrics to ensure closure.
• Provide verification-focused feedback during design specification discussions.
• Implement UVM testbenches, including writing tests, sequences, functional coverage, assertions, and verification plans.
• Take ownership of task definition, effort estimation, and progress tracking.
• Contribute to the enhancement and evolution of GPU verification methodologies.
• Lead, mentor, and support team members in verification activities.
• Engage in design and verification reviews, suggesting improvements where necessary.

Profile:

Committed to making your customers, stakeholders and colleagues successful, youre an excellent communicator, listener and collaborator who builds trusted partnerships by delivering what you say, when you say. Youre curious, solutions orientated and a world-class problem solver who constantly seeks opportunities to innovate and achieve the best possible outcome to the highest imaginable standard.

You'll have:

• Demonstrated experience in developing verification environments for complex RTL designs.
• Strong understanding of constrained-random verification methodologies and the challenges of achieving verification closure.
• Ability to define verification requirements, determine implementation approaches, and design testbenches.
• Expertise in root-cause analysis of complex issues, with the ability to resolve them efficiently.
• Deep knowledge of SystemVerilog and UVM.
• Capability to develop and enhance verification flows.
• Familiarity with ASIC design methodologies, flows, and tools.
• Proficiency in planning, estimating, and tracking personal tasks.
• Experience managing multiple projects simultaneously.
• Strong communication skills for effectively conveying technical issues, both verbally and in writing.

You might also have:

• Experience leading teams.
• Knowledge of Graphics, GPU, CPU, or SoC architectures.
• Experience with broader verification technologies, including formal property-based verification (FPV).
• Proficiency in coding and scripting using Python, TCL, Perl, SystemC, or C++.
• Understanding of functional safety standards such as ISO26262.